Generally, in semiconductor processing, multiple tools are used to process multiple wafers at each processing step. Once each processing step is completed for each wafer, the wafer then is typically dispatched randomly to one of multiple tools for processing at the next processing stage. FIG. 1 illustrates a simplified example of this random dispatching. Initially, wafers 2 are dispatched to one of the first stage processing tools 10, 12, 14, or 16. After the first stage processing is complete, the wafers 2 are then randomly dispatched to one of the second stage processing tools 20, 22, 24, 26, 28, or 30. Further, after the second stage processing is complete, the wafers 2 again are randomly dispatched to one of the third stage processing tools 40, 42, or 44.
These multiple tools and multiple random paths conventionally require the implementation of a large number of complex models used for virtual metrology. Each tool or chamber must be considered separately as a single model. Accordingly, the models are difficult to maintain and adapt. Further, a new model generally must be created every time a new tool is employed. Also, virtual wafer acceptance testing (VWAT) realization is difficult, if not impossible, because of the multiple sequences of tool combinations. For example, in the simplified example of FIG. 1, to realize VWAT, seventy-two models would have to be created and maintained (4×6×3=72). However, in real world manufacturing, the necessary number of models would number in the thousands because there are generally many more stages and processing tools per each stage.
Further, with the random dispatching, prediction results are typically poor because a model for each route of processing would be built on a small amount of lots. Without a larger dataset from more lots, obtaining a precise prediction model is generally very difficult to achieve. Accordingly, there is a need in the art to overcome or obviate these stated deficiencies.